Hardware

An ESP32-S3 driving four VEX V5 Competition Switch ports through optocouplers. Hardware revision 1.1.

Overview


MCU	`ESP32-S3-WROOM-1-N16R8`
Flash	16 MB, dio mode
USB bridge	`CH340C`
Ports	4 × RJ11, driven in unison
Isolation	PC817C optocoupler per signal (8 total)
Power	USB-C, with TP4056 battery charging

Every output is optically isolated, so there is no electrical path between the V5 and the USB host. The board sinks the V5's own signal lines rather than driving voltage into them.

Pin map

Each port carries an ENABLE/DISABLE line and a DRIVER/AUT line. All four ports move together.

Port	ENABLE/DISABLE	DRIVER/AUT
1	`IO7`	`IO15`
2	`IO16`	`IO17`
3	`IO18`	`IO8`
4	`IO19`	`IO20`

Signal	HIGH	LOW
ENABLE/DISABLE	Disabled (safe)	Enabled
DRIVER/AUT	Autonomous	Driver

The two signals have opposite safe levels. ENABLE/DISABLE rests HIGH, DRIVER/AUT rests LOW. The firmware drives them explicitly rather than through one shared polarity.

IO19 and IO20 are the ESP32-S3 native USB D−/D+ pins, used here as ordinary GPIO for port 4. That is why native USB-Serial is unavailable and all serial traffic runs over the CH340C on UART0 (IO43/IO44).

Firmware constants

Constant	Value	Meaning
`WATCHDOG_TIMEOUT_MS`	600 ms	Manual-mode comms watchdog. Suspended during a timed period.
`HEARTBEAT_INTERVAL_MS`	1000 ms	Unsolicited heartbeat event interval.
`PERIOD_MIN_MS`	1 ms	Shortest timed period.
`PERIOD_MAX_MS`	600000 ms	Longest timed period (10 minutes).
`TWDT_BACKSTOP_MS`	10000 ms	Task-watchdog margin past duration_ms; a firmware hang reboots to Disabled.
`IDENTIFY_DURATION_MS`	3000 ms	Length of the identify indication.

Building the firmware

PlatformIO, with the target and build flags pinned in firmware/platformio.ini.

Flash mode must be dio. The N16R8 modules boot-loop the second-stage bootloader when flashed with a qio image. The setting is pinned in platformio.ini so builds, uploads and merged images all inherit it.

ARDUINO_USB_CDC_ON_BOOT must stay 0. Mapping Serial to native USB points the firmware at a dead interface on this board.

Design files

The full design is published under CERN-OHL-P-2.0 — free to manufacture, modify and sell. See the license. The board was drawn in EasyEDA Pro; the gerbers below are what the fabricator needs and are readable by any CAM tool.

File	Format	Size
Gerbers and drill files	`RS-274X + Excellon, zip`	98 KB
Schematic	`PDF`	308 KB
Bill of materials	`XLSX`	9 KB
Pick and place	`XLSX`	11 KB
3D model	`STEP, zip`	2.6 MB
Board outline	`DXF, zip`	220 KB
EasyEDA Pro project	`EPRJ2`	1.3 MB

Fabrication was ordered from the gerber archive as-is: 4 layers, 1.6 mm FR-4, 1 oz copper, HASL. The pick-and-place and BOM files are formatted for JLCPCB assembly.

The .eprj2 project file only opens in EasyEDA Pro. Everything needed to build the board without it — gerbers, drills, BOM, placement, outline and 3D model — is listed above.

Sources are versioned alongside the firmware at github.com/Elevation-Robotics/OpenFC.

Not VEX hardware

OpenFC is an independent open-source project of Elevation Robotics. It is not manufactured, endorsed, approved or sponsored by VEX Robotics or the REC Foundation, and is not affiliated with either. Those names appear here only to describe what the board is compatible with.